`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    14:41:04 11/28/2011 
// Design Name: 
// Module Name:    packet_capture 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module capture_module(
  input               CLK,
  input               RST,
  
  input       [31:0]  S_AWADDR,
  input               S_AWVALID,
  output              S_AWREADY,
  input       [31:0]  S_WDATA,
  input       [3:0]   S_WSTRB,
  input               S_WVALID,
  output              S_WREADY,
  output      [1:0]   S_BRESP,
  output              S_BVALID,
  input               S_BREADY,
  input       [31:0]  S_ARADDR,
  input               S_ARVALID,
  output              S_ARREADY,
  output      [31:0]  S_RDATA,
  output      [1:0]   S_RRESP,
  output              S_RVALID,
  input               S_RREADY,
  
  output  reg [1:0]  up_sel = 0,
  output  reg [1:0]  dn_sel = 0,
  input   [47:0]  TIME,
  input           TRIG,
  
  input           S_UP_TVALID,
  input   [127:0] S_UP_TDATA,
  input   [3:0]   S_UP_TSTRB,
  input           S_UP_TLAST,
  input           S_DN_TVALID,
  input  [127:0]  S_DN_TDATA,
  input  [3:0]    S_DN_TSTRB,
  input           S_DN_TLAST,

  output  [0:0]   M_UP_AWID,
  output  [31:0]  M_UP_AWADDR,
  output  [7:0]   M_UP_AWLEN,
  output  [2:0]   M_UP_AWSIZE,
  output  [1:0]   M_UP_AWBURST,
  output          M_UP_AWVALID,
  input           M_UP_AWREADY,
  output  [127:0] M_UP_WDATA,
  output  [15:0]  M_UP_WSTRB,
  output          M_UP_WLAST,
  output          M_UP_WVALID,
  input           M_UP_WREADY,
  input   [0:0]   M_UP_BID,
  input   [1:0]   M_UP_BRESP,
  input           M_UP_BVALID,
  output          M_UP_BREADY,

  output  [0:0]   M_DN_AWID,
  output  [31:0]  M_DN_AWADDR,
  output  [7:0]   M_DN_AWLEN,
  output  [2:0]   M_DN_AWSIZE,
  output  [1:0]   M_DN_AWBURST,
  output          M_DN_AWVALID,
  input           M_DN_AWREADY,
  output  [127:0] M_DN_WDATA,
  output  [15:0]  M_DN_WSTRB,
  output          M_DN_WLAST,
  output          M_DN_WVALID,
  input           M_DN_WREADY,
  input   [0:0]   M_DN_BID,
  input   [1:0]   M_DN_BRESP,
  input           M_DN_BVALID,
  output          M_DN_BREADY
    );

  wire rp_en;
  wire [3:0] rp_we;
  wire [5:0] rp_a;
  wire [31:0] rp_rd;
  wire [31:0] rp_wd;
  wire rp_rdy;

  AxiLite2RP 
  al2rp(
    .CLK(CLK),
    .RST(RST),
    
    .S_AWADDR   (S_AWADDR ),
    .S_AWVALID  (S_AWVALID),
    .S_AWREADY  (S_AWREADY),
    .S_WDATA    (S_WDATA  ),
    .S_WSTRB    (S_WSTRB  ),
    .S_WVALID   (S_WVALID ),
    .S_WREADY   (S_WREADY ),
    .S_BRESP    (S_BRESP  ),
    .S_BVALID   (S_BVALID ),
    .S_BREADY   (S_BREADY ),
    .S_ARADDR   (S_ARADDR ),
    .S_ARVALID  (S_ARVALID),
    .S_ARREADY  (S_ARREADY),
    .S_RDATA    (S_RDATA  ),
    .S_RRESP    (S_RRESP  ),
    .S_RVALID   (S_RVALID ),
    .S_RREADY   (S_RREADY ),
    
    .RP_EN      (rp_en ),
    .RP_WE      (rp_we ),
    .RP_A       (rp_a  ),
    .RP_RD      (rp_rd ),
    .RP_WD      (rp_wd ),
    .RP_RDY     (rp_rdy)
  );
    
  wire        up_en = (rp_a[5:4] == 2'b00) ? rp_en : 1'b0;
  wire [3:0]  up_we = (rp_a[5:4] == 2'b00) ? rp_we : 4'b0;
  wire [3:0]  up_a = rp_a[3:0];
  wire [31:0] up_wd = rp_wd;
  wire [31:0] up_rd;
  wire        up_rdy;
  
  wire        dn_en = (rp_a[5:4] == 2'b01) ? rp_en : 1'b0;
  wire [3:0]  dn_we = (rp_a[5:4] == 2'b01) ? rp_we : 4'b0;
  wire [3:0]  dn_a = rp_a[3:0];
  wire [31:0] dn_wd = rp_wd;
  wire [31:0] dn_rd;
  wire        dn_rdy;
  
  assign rp_rd =  (rp_a[5:4] == 2'b00) ? up_rd :
                  (rp_a[5:4] == 2'b01) ? dn_rd : 32'b0;
  assign rp_rdy = up_rdy || dn_rdy;
  
  stream_capture up_cap(
    .CLK            (CLK),
    .RST            (RST),
    
    .RP_EN          (up_en),
    .RP_WE          (up_we),
    .RP_A           (up_a),
    .RP_DI          (up_wd),
    .RP_DO          (up_rd),
    .RP_RDY         (up_rdy),

    .TIME           (TIME),
    .TRIG           (TRIG),
    .VALID          (S_UP_TVALID ),
    .DATA           (S_UP_TDATA  ),
    .STRB           (S_UP_TSTRB  ),
    .LAST           (S_UP_TLAST  ),

    .M_AWID         (M_UP_AWID      ),
    .M_AWADDR       (M_UP_AWADDR    ),
    .M_AWLEN        (M_UP_AWLEN     ),
    .M_AWSIZE       (M_UP_AWSIZE    ),
    .M_AWBURST      (M_UP_AWBURST   ),
    .M_AWVALID      (M_UP_AWVALID   ),
    .M_AWREADY      (M_UP_AWREADY   ),
    .M_WDATA        (M_UP_WDATA     ),
    .M_WSTRB        (M_UP_WSTRB     ),
    .M_WLAST        (M_UP_WLAST     ),
    .M_WVALID       (M_UP_WVALID    ),
    .M_WREADY       (M_UP_WREADY    ),
    .M_BID          (M_UP_BID       ),
    .M_BRESP        (M_UP_BRESP     ),
    .M_BVALID       (M_UP_BVALID    ),
    .M_BREADY       (M_UP_BREADY    )
  );
  
  stream_capture dn_cap(
    .CLK            (CLK),
    .RST            (RST),
    
    .RP_EN          (dn_en),
    .RP_WE          (dn_we),
    .RP_A           (dn_a),
    .RP_DI          (dn_wd),
    .RP_DO          (dn_rd),
    .RP_RDY         (dn_rdy),

    .TIME           (TIME),
    .TRIG           (TRIG),
    .VALID          (S_DN_TVALID ),
    .DATA           (S_DN_TDATA  ),
    .STRB           (S_DN_TSTRB  ),
    .LAST           (S_DN_TLAST  ),

    .M_AWID         (M_DN_AWID      ),
    .M_AWADDR       (M_DN_AWADDR    ),
    .M_AWLEN        (M_DN_AWLEN     ),
    .M_AWSIZE       (M_DN_AWSIZE    ),
    .M_AWBURST      (M_DN_AWBURST   ),
    .M_AWVALID      (M_DN_AWVALID   ),
    .M_AWREADY      (M_DN_AWREADY   ),
    .M_WDATA        (M_DN_WDATA     ),
    .M_WSTRB        (M_DN_WSTRB     ),
    .M_WLAST        (M_DN_WLAST     ),
    .M_WVALID       (M_DN_WVALID    ),
    .M_WREADY       (M_DN_WREADY    ),
    .M_BID          (M_DN_BID       ),
    .M_BRESP        (M_DN_BRESP     ),
    .M_BVALID       (M_DN_BVALID    ),
    .M_BREADY       (M_DN_BREADY    )
  );
  
    
endmodule
